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Adaptive Digital Circuits for Power-Performance Range beyond Wide Voltage Scaling (eBook)

From the Clock Path to the Data Path
Artikelnummer: 978-3-030-38796-9
Einband: PDF
Verfügbarkeit: Download, sofort verfügbar (Link per E-Mail)
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This book offers the first comprehensive coverage of digital design techniques to expand the power-performance tradeoff well beyond that allowed by conventional wide voltage scaling.  Compared to conventional fixed designs, the approach described in this book makes digital circuits more versatile and adaptive, allowing simultaneous optimization at both ends of the power-performance spectrum. Drop-in solutions for fully automated and low-effort design based on commercial CAD tools are discussed extensively for processors, accelerators and on-chip memories, and are applicable to prominent applications (e.g., IoT, AI, wearables, biomedical).  Through the higher power-performance versatility techniques described in this book, readers are enabled to reduce the design effort through reuse of the same digital design instance, across a wide range of applications.  All concepts the authors discuss are demonstrated by dedicated testchip designs and experimental results. To make the results immediately usable by the reader, all the scripts necessary to create automated design flows based on commercial tools are provided and explained.

  • Provides extensive coverage of the challenges and the key technologies enabling wide power-performance range in digital sub-systems (e.g., processors, memories, accelerators);
  • Includes in-depth description of silicon-proven methodologies to design reconfigurable data path and clock path;
  • Describes techniques for reconfigurable microarchitectures, down to the pipestage and the clock repeater level;
  • Uses a highly interdisciplinary approach covering the circuit, the microarchitectural and the system levels of abstraction;
  • Presents practical design examples and the related methodologies;
  • Offers complementary design files and scripts, useful to replicate the presented developments and develop new designs.

This book offers the first comprehensive coverage of digital design techniques to expand the power-performance tradeoff well beyond that allowed by conventional wide voltage scaling.  Compared to conventional fixed designs, the approach described in this book makes digital circuits more versatile and adaptive, allowing simultaneous optimization at both ends of the power-performance spectrum. Drop-in solutions for fully automated and low-effort design based on commercial CAD tools are discussed extensively for processors, accelerators and on-chip memories, and are applicable to prominent applications (e.g., IoT, AI, wearables, biomedical).  Through the higher power-performance versatility techniques described in this book, readers are enabled to reduce the design effort through reuse of the same digital design instance, across a wide range of applications.  All concepts the authors discuss are demonstrated by dedicated testchip designs and experimental results. To make the results immediately usable by the reader, all the scripts necessary to create automated design flows based on commercial tools are provided and explained.

  • Provides extensive coverage of the challenges and the key technologies enabling wide power-performance range in digital sub-systems (e.g., processors, memories, accelerators);
  • Includes in-depth description of silicon-proven methodologies to design reconfigurable data path and clock path;
  • Describes techniques for reconfigurable microarchitectures, down to the pipestage and the clock repeater level;
  • Uses a highly interdisciplinary approach covering the circuit, the microarchitectural and the system levels of abstraction;
  • Presents practical design examples and the related methodologies;
  • Offers complementary design files and scripts, useful to replicate the presented developments and develop new designs.

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VerlagSpringer International Publishing
EinbandPDF
Erscheinungsjahr2020
Seitenangabe166 S.
AusgabekennzeichenEnglisch
AbbildungenXVI, 166 p. 113 illus., 106 illus. in color.
Masse15'615 KB
PlattformPDF
AutorJain, Saurabh / Lin, Longyang / Alioto, Massimo

Über den Autor Saurabh Jain

Saurabh Jain is a consultant ophthalmic surgeon at the Royal Free London NHS Foundation Trust (London, UK) and Honorary Associate Professor and the year two MBBS academic lead for the UCL Medical School. He has special expertise in all aspects of paediatric ophthalmology and strabismus. He started his ophthalmology career at Kings College Hospital, London and has undergone specialist training at the Leicester Royal Infirmary and Manchester Royal Eye Hospital.Dr Jain is involved in running a busy full time clinical service at the Royal Free, Whittington, University College London and Barnet hospitals, which includes clinical work, training junior surgeons and allied clinical professionals, research and educational activities. He has special interest in training junior surgeons in the systematic diagnosis of strabismus and the use of minimally invasive strabismus surgical techniques.He is a member of the American Association of Paediatric Ophthalmology and Strabismus, European Board of Ophthalmology and the International Strabismological Association. He is the education  officer for the British and Irish Paediatric Ophthalmology and Strabismus Association (BIPOSA) and council member of the European Strabismus Association (ESA). He is the senior international examiner for the Royal College of Ophthalmologists.

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